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Lower minimum clearance to pass DRC

This commit is contained in:
Luca 2022-02-27 20:24:26 +01:00
parent e7bbb72575
commit 9b45732d05
2 changed files with 301 additions and 5 deletions
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304
microsd-breakout.kicad_pcb
View File

@ -25,13 +25,13 @@
(setup
(stackup
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(layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
(layer "F.SilkS" (type "Top Silk Screen") (color "White"))
(layer "F.Mask" (type "Top Solder Mask") (color "Purple") (thickness 0.01))
(layer "F.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 1" (type "core") (thickness 0.71) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "B.Cu" (type "copper") (thickness 0.035))
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(layer "B.SilkS" (type "Bottom Silk Screen"))
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(layer "B.SilkS" (type "Bottom Silk Screen") (color "White"))
(copper_finish "ENIG")
(dielectric_constraints no)
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@ -198,6 +198,19 @@
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2
microsd-breakout.kicad_pro
View File

@ -353,7 +353,7 @@
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