feat: add courtyard to USB A pcb plug

This commit is contained in:
Luca 2024-01-06 02:34:31 +01:00
parent 191dad7ffc
commit 5e89866e6a
1 changed files with 16 additions and 0 deletions

View File

@ -15,6 +15,22 @@
(stroke (width 0.12) (type solid)) (layer "Dwgs.User") (tstamp 7331ebe7-674e-4499-9392-11ec2b75fafa))
(fp_line (start 6 0) (end 6 11.75)
(stroke (width 0.12) (type solid)) (layer "Dwgs.User") (tstamp 00cf0f20-81cc-4e18-b7bd-841538921b12))
(fp_line (start -6 0) (end -6 11.75)
(stroke (width 0.05) (type default)) (layer "B.CrtYd") (tstamp 39358cd7-b5ea-459a-ae9e-af29821c84ee))
(fp_line (start -6 0) (end 6 0)
(stroke (width 0.05) (type default)) (layer "B.CrtYd") (tstamp a15cf5a9-cefa-487a-9352-09aab7e12806))
(fp_line (start -6 11.75) (end 6 11.75)
(stroke (width 0.05) (type default)) (layer "B.CrtYd") (tstamp e08cec75-59dd-4010-aaa7-6c6b357ac344))
(fp_line (start 6 0) (end 6 11.75)
(stroke (width 0.05) (type default)) (layer "B.CrtYd") (tstamp 181e6f07-f21d-4db7-b736-fbd0fdca0b4d))
(fp_line (start -6 0) (end -6 11.75)
(stroke (width 0.05) (type default)) (layer "F.CrtYd") (tstamp 9763d18b-8c48-4c9b-a893-6018acc9d27a))
(fp_line (start -6 0) (end 6 0)
(stroke (width 0.05) (type default)) (layer "F.CrtYd") (tstamp b4344ee9-04c2-4f20-b9eb-351bfa31f65a))
(fp_line (start -6 11.75) (end 6 11.75)
(stroke (width 0.05) (type default)) (layer "F.CrtYd") (tstamp 04fd30a8-0a87-4c5b-8940-99c94f8381b9))
(fp_line (start 6 0) (end 6 11.75)
(stroke (width 0.05) (type default)) (layer "F.CrtYd") (tstamp 902cbeba-9ead-4b0f-8e72-81e52d155dbd))
(pad "1" connect rect (at -3.5 4.945) (size 1 7.41) (layers "F.Cu" "F.Mask") (tstamp 3084e8d9-a6af-4c86-866c-3eff2f2f89fb))
(pad "2" connect rect (at -1 5.445) (size 1 6.41) (layers "F.Cu" "F.Mask") (tstamp 223799e8-ff03-4336-9a12-5896d873691a))
(pad "3" connect rect (at 1 5.445) (size 1 6.41) (layers "F.Cu" "F.Mask") (tstamp 483652d0-8949-4c48-b61b-2a9d3df7aa2e))