diff --git a/dvi.v b/dvi.v
index 8edb563..4e870df 100644
--- a/dvi.v
+++ b/dvi.v
@@ -80,11 +80,7 @@ module dvi #(
 			x <= 12'b0;
 			y <= 11'b0;
 
-			if (~reset) begin
-				ck <= 0;
-
-				output_state <= OUTPUT_BLANK;
-			end
+			if (~reset) output_state <= OUTPUT_BLANK;
 		end
 		OUTPUT_BLANK: begin
 			if (y >= V_ACTIVE_START && y < V_BLANK_START && x == H_ACTIVE_START-1) output_state <= OUTPUT_DATA;
@@ -94,9 +90,6 @@ module dvi #(
 				y <= y + 1;
 
 				if (y == V_TOTAL-1) begin
-					bus_addr <= BASE_ADDR;
-
-					fetch_state <= FETCH_LOW;
 					y <= 11'b0;
 				end
 			end
@@ -124,7 +117,14 @@ module dvi #(
 	end
 
 	always @(negedge bus_clk) begin
-		if (output_state != OUTPUT_IDLE) ck <= ~ck;
+		if (output_state == OUTPUT_IDLE) ck <= 0;
+		else                             ck <= ~ck;
+
+		if (y == 11'b0) begin
+			bus_addr <= BASE_ADDR;
+
+			fetch_state <= FETCH_LOW;
+		end
 
 		if (fetch_en) begin
 			data[active_data] <= {12'b0, data[active_data][47:12]};