From 195990d2b100c6f8fc30666dc85ac08f59a94077 Mon Sep 17 00:00:00 2001 From: Luca Date: Fri, 25 Oct 2024 20:26:58 +0200 Subject: [PATCH] feat(dvi): increase addr width to 24 --- dvi.v | 4 ++-- pixelflut.v | 7 ++++--- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/dvi.v b/dvi.v index 4e870df..afbb0a4 100644 --- a/dvi.v +++ b/dvi.v @@ -1,5 +1,5 @@ module dvi #( - parameter [15:0] BASE_ADDR = 16'h0000, + parameter [23:0] BASE_ADDR = 24'h000000, parameter H_ACTIVE_START = 136, parameter H_BLANK_START = 792, @@ -19,7 +19,7 @@ module dvi #( ) ( input bus_clk, input [15:0] bus_data, - output reg [15:0] bus_addr, + output reg [23:0] bus_addr, input reset, diff --git a/pixelflut.v b/pixelflut.v index ade8aca..aeced6b 100644 --- a/pixelflut.v +++ b/pixelflut.v @@ -33,12 +33,13 @@ module pixelflut ( dvi_bus_clk <= ~dvi_bus_clk; end - wire [15:0] dvi_bus; + wire [15:0] dvi_bus_data; + wire [23:0] dvi_bus_addr; dvi display ( .bus_clk (dvi_bus_clk), - .bus_data(dvi_bus), - .bus_addr(dvi_bus), + .bus_data(dvi_bus_data), + .bus_addr(dvi_bus_addr), .reset (1'b0), .d (dvi_d), .ck (dvi_ck),