From e7bbb72575b0a1b3a489bd6770a47ffe4c5a9a35 Mon Sep 17 00:00:00 2001 From: Luca Date: Sun, 27 Feb 2022 19:39:58 +0100 Subject: [PATCH] Design basic breakout board --- microsd-breakout.kicad_pcb | 226 +++++++++++++++++++++- microsd-breakout.kicad_pro | 375 +++++++++++++++++++++++++++++++++++-- microsd-breakout.kicad_sch | 293 ++++++++++++++++++++++++++++- 3 files changed, 879 insertions(+), 15 deletions(-) diff --git a/microsd-breakout.kicad_pcb b/microsd-breakout.kicad_pcb index 28b47a1..4a05bb1 100644 --- a/microsd-breakout.kicad_pcb +++ b/microsd-breakout.kicad_pcb @@ -1,2 +1,226 @@ (kicad_pcb (version 20211014) (generator pcbnew) -) \ No newline at end of file + + (general + (thickness 0.8) + ) + + (paper "A4") + (layers + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (49 "F.Fab" user) + ) + + (setup + (stackup + (layer "F.SilkS" (type "Top Silk Screen")) + (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) + (layer "F.Cu" (type "copper") (thickness 0.035)) + (layer "dielectric 1" (type "core") (thickness 0.71) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) + (layer "B.Cu" (type "copper") (thickness 0.035)) + (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) + (layer "B.SilkS" (type "Bottom Silk Screen")) + (copper_finish "ENIG") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (pcbplotparams + (layerselection 0x00010fc_ffffffff) + (disableapertmacros false) + (usegerberextensions false) + (usegerberattributes true) + (usegerberadvancedattributes true) + (creategerberjobfile true) + (svguseinch false) + (svgprecision 6) + (excludeedgelayer true) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (dxfpolygonmode true) + (dxfimperialunits true) + (dxfusepcbnewfont true) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (sketchpadsonfab false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + + (net 0 "") + (net 1 "Net-(J1-Pad1)") + (net 2 "Net-(J1-Pad2)") + (net 3 "Net-(J1-Pad3)") + (net 4 "Net-(J1-Pad4)") + (net 5 "Net-(J1-Pad5)") + (net 6 "Net-(J1-Pad6)") + (net 7 "Net-(J1-Pad7)") + (net 8 "Net-(J1-Pad8)") + + (footprint "microsd-breakout:microSD" (layer "F.Cu") + (tedit 621B8E8E) (tstamp c32ecaa5-e8be-4d49-94dc-a175619ac626) + (at 142 105) + (property "Sheetfile" "microsd-breakout.kicad_sch") + (property "Sheetname" "") + (property "exclude_from_bom" "") + (path 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"through_hole_pad_without_hole": "error", + "too_many_vias": "error", + "track_dangling": "warning", + "track_width": "error", + "tracks_crossing": "error", + "unconnected_items": "error", + "unresolved_variable": "error", + "via_dangling": "warning", + "zone_has_empty_net": "error", + "zones_intersect": "error" + }, + "rules": { + "allow_blind_buried_vias": false, + "allow_microvias": false, + "max_error": 0.005, + "min_clearance": 0.0, + "min_copper_edge_clearance": 0.0, + "min_hole_clearance": 0.25, + "min_hole_to_hole": 0.25, + "min_microvia_diameter": 0.19999999999999998, + "min_microvia_drill": 0.09999999999999999, + "min_silk_clearance": 0.0, + "min_through_hole_diameter": 0.3, + "min_track_width": 0.19999999999999998, + "min_via_annular_width": 0.049999999999999996, + "min_via_diameter": 0.39999999999999997, + "solder_mask_clearance": 0.0, + "solder_mask_min_width": 0.0, + "use_height_for_length_calcs": true + }, + "track_widths": [ + 0.0 + ], + "via_dimensions": [ + { + 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"wire_dangling": "error" + } + }, "libraries": { "pinned_footprint_libs": [], "pinned_symbol_libs": [] @@ -74,9 +386,48 @@ "page_layout_descr_file": "" }, "schematic": { + "annotate_start_num": 0, + "drawing": { + "default_line_thickness": 6.0, + "default_text_size": 50.0, + "field_names": [], + "intersheets_ref_own_page": false, + "intersheets_ref_prefix": "", + "intersheets_ref_short": false, + "intersheets_ref_show": false, + "intersheets_ref_suffix": "", + "junction_size_choice": 3, + "label_size_ratio": 0.375, + "pin_symbol_size": 25.0, + "text_offset_ratio": 0.15 + }, "legacy_lib_dir": "", - "legacy_lib_list": [] + "legacy_lib_list": [], + "meta": { + "version": 1 + }, + "net_format_name": "", + "ngspice": { + "fix_include_paths": true, + "fix_passive_vals": false, + "meta": { + "version": 0 + }, + "model_mode": 0, + "workbook_filename": "" + }, + "page_layout_descr_file": "", + "plot_directory": "", + "spice_adjust_passive_values": false, + "spice_external_command": "spice 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