diff --git a/ethernet-pmod.kicad_pcb b/ethernet-pmod.kicad_pcb
index 28b47a1..2e61afc 100644
--- a/ethernet-pmod.kicad_pcb
+++ b/ethernet-pmod.kicad_pcb
@@ -1,2 +1,2522 @@
 (kicad_pcb (version 20211014) (generator pcbnew)
-)
\ No newline at end of file
+
+  (general
+    (thickness 1.6)
+  )
+
+  (paper "A4")
+  (layers
+    (0 "F.Cu" signal)
+    (31 "B.Cu" signal)
+    (32 "B.Adhes" user "B.Adhesive")
+    (33 "F.Adhes" user "F.Adhesive")
+    (34 "B.Paste" user)
+    (35 "F.Paste" user)
+    (36 "B.SilkS" user "B.Silkscreen")
+    (37 "F.SilkS" user "F.Silkscreen")
+    (38 "B.Mask" user)
+    (39 "F.Mask" user)
+    (40 "Dwgs.User" user "User.Drawings")
+    (41 "Cmts.User" user "User.Comments")
+    (42 "Eco1.User" user "User.Eco1")
+    (43 "Eco2.User" user "User.Eco2")
+    (44 "Edge.Cuts" user)
+    (45 "Margin" user)
+    (46 "B.CrtYd" user "B.Courtyard")
+    (47 "F.CrtYd" user "F.Courtyard")
+    (48 "B.Fab" user)
+    (49 "F.Fab" user)
+    (50 "User.1" user)
+    (51 "User.2" user)
+    (52 "User.3" user)
+    (53 "User.4" user)
+    (54 "User.5" user)
+    (55 "User.6" user)
+    (56 "User.7" user)
+    (57 "User.8" user)
+    (58 "User.9" user)
+  )
+
+  (setup
+    (stackup
+      (layer "F.SilkS" (type "Top Silk Screen"))
+      (layer "F.Paste" (type "Top Solder Paste"))
+      (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
+      (layer "F.Cu" (type "copper") (thickness 0.035))
+      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
+      (layer "B.Cu" (type "copper") (thickness 0.035))
+      (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
+      (layer "B.Paste" (type "Bottom Solder Paste"))
+      (layer "B.SilkS" (type "Bottom Silk Screen"))
+      (copper_finish "HAL lead-free")
+      (dielectric_constraints no)
+    )
+    (pad_to_mask_clearance 0)
+    (pcbplotparams
+      (layerselection 0x00010fc_ffffffff)
+      (disableapertmacros false)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile true)
+      (svguseinch false)
+      (svgprecision 6)
+      (excludeedgelayer true)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (dxfpolygonmode true)
+      (dxfimperialunits true)
+      (dxfusepcbnewfont true)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (sketchpadsonfab false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory "")
+    )
+  )
+
+  (net 0 "")
+  (net 1 "+1V2")
+  (net 2 "GND")
+  (net 3 "VDDA")
+  (net 4 "+3V3")
+  (net 5 "Net-(C7-Pad1)")
+  (net 6 "Net-(C7-Pad2)")
+  (net 7 "VDC")
+  (net 8 "GND1")
+  (net 9 "+5V")
+  (net 10 "Net-(C10-Pad2)")
+  (net 11 "Net-(D1-Pad2)")
+  (net 12 "/DC+A")
+  (net 13 "Net-(D2-Pad3)")
+  (net 14 "/DC-A")
+  (net 15 "/DC+B")
+  (net 16 "/DC-B")
+  (net 17 "Net-(D4-Pad1)")
+  (net 18 "Net-(D5-Pad1)")
+  (net 19 "/LED2")
+  (net 20 "/LED1")
+  (net 21 "/RXD1")
+  (net 22 "/RXER")
+  (net 23 "/REFCLK")
+  (net 24 "/TXD0")
+  (net 25 "/RXD0")
+  (net 26 "/CRS_DV")
+  (net 27 "/TXEN")
+  (net 28 "/TXD1")
+  (net 29 "/MDIO")
+  (net 30 "/MDC")
+  (net 31 "/TXN")
+  (net 32 "/TXP")
+  (net 33 "/RXN")
+  (net 34 "/RXP")
+  (net 35 "Net-(R10-Pad1)")
+  (net 36 "Net-(R11-Pad1)")
+  (net 37 "Net-(R12-Pad2)")
+  (net 38 "Net-(SW1-Pad2)")
+  (net 39 "Net-(C12-Pad1)")
+  (net 40 "Net-(C13-Pad1)")
+  (net 41 "unconnected-(U2-Pad6)")
+  (net 42 "unconnected-(U2-Pad7)")
+  (net 43 "Net-(R16-Pad2)")
+  (net 44 "/RX-")
+  (net 45 "/RX+")
+  (net 46 "/TX-")
+  (net 47 "/TX+")
+  (net 48 "Net-(J1-Pad9)")
+  (net 49 "Net-(J1-Pad12)")
+
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+    (fp_line (start 2.1 1.7) (end 2.1 -1.7) (layer "F.CrtYd") (width 0.05) (tstamp b3c48058-01d3-4b41-b248-0973f960f9f1))
+    (fp_line (start -2.1 -1.7) (end -2.1 1.7) (layer "F.CrtYd") (width 0.05) (tstamp f26b2589-14e9-4f65-a1a5-f9a64a00c2c9))
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+    (fp_line (start -1.6 0.25) (end -0.6 1.25) (layer "F.Fab") (width 0.1) (tstamp 17b360cf-a991-4077-a0a0-d02fbdeb49bf))
+    (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer "F.Fab") (width 0.1) (tstamp 7836abd9-27be-411a-bae0-688fb8945c2e))
+    (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer "F.Fab") (width 0.1) (tstamp 7ad36b0e-d36c-406b-8b6f-6550dc702c93))
+    (fp_line (start -1.6 -1.25) (end -1.6 1.25) (layer "F.Fab") (width 0.1) (tstamp eac21e28-fa19-4a61-8985-6a3c4e3903ab))
+    (pad "1" smd rect (at -1.1 0.85) (size 1.4 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+      (net 40 "Net-(C13-Pad1)") (pinfunction "1") (pintype "passive") (tstamp 97a3860c-b54b-4217-a8ab-3b72551edf70))
+    (pad "2" smd rect (at 1.1 0.85) (size 1.4 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+      (net 2 "GND") (pinfunction "2") (pintype "passive") (tstamp 8ac13624-d49d-45f0-a143-31eebaacf5dd))
+    (pad "3" smd rect (at 1.1 -0.85) (size 1.4 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+      (net 39 "Net-(C12-Pad1)") (pinfunction "3") (pintype "passive") (tstamp 2d4fb1c3-de9b-4754-a443-5a65672cc5c4))
+    (pad "4" smd rect (at -1.1 -0.85) (size 1.4 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+      (net 2 "GND") (pinfunction "4") (pintype "passive") (tstamp 26242a1b-1b1a-4fec-9d6c-8a2fad3c1ad2))
+    (model "${KICAD6_3DMODEL_DIR}/Crystal.3dshapes/Crystal_SMD_3225-4Pin_3.2x2.5mm.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (footprint "Resistor_SMD:R_0402_1005Metric" (layer "F.Cu")
+    (tedit 5F68FEEE) (tstamp fb2f2d56-6de0-4aac-804f-4f4fe2da9475)
+    (at 141.5 109 90)
+    (descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags "resistor")
+    (property "LCSC" "C25120")
+    (property "Sheetfile" "Datei: ethernet-pmod.kicad_sch")
+    (property "Sheetname" "")
+    (path "/e1ef020b-0521-4305-9148-915baebee665")
+    (attr smd)
+    (fp_text reference "R3" (at 0 -1.17 90) (layer "F.SilkS")
+      (effects (font (size 0.8 0.8) (thickness 0.12)))
+      (tstamp daa6406f-3be3-4b0b-8bea-256b8e17f064)
+    )
+    (fp_text value "49R9" (at 0 1.17 90) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 512486c6-dc11-4210-b28a-614c4c682088)
+    )
+    (fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab")
+      (effects (font (size 0.26 0.26) (thickness 0.04)))
+      (tstamp 70ccb878-9423-4db9-9b02-c32643943427)
+    )
+    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer "F.SilkS") (width 0.12) (tstamp 23db2f99-a677-4bed-af8f-defcc5513ac3))
+    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer "F.SilkS") (width 0.12) (tstamp 55fd145a-cc52-4612-97fd-7eea1205d237))
+    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer "F.CrtYd") (width 0.05) (tstamp 9ae9436a-5e53-4f3a-91a6-bec98de175a0))
+    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer "F.CrtYd") (width 0.05) (tstamp a2a2c4cb-afb0-42cb-a16b-ec72685ddc0f))
+    (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer "F.CrtYd") (width 0.05) (tstamp c3aed92e-8117-4ad4-9bf8-bf3ea8793c5b))
+    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer "F.CrtYd") (width 0.05) (tstamp e7574cd7-ed34-4cb3-a449-8508e7facb07))
+    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer "F.Fab") (width 0.1) (tstamp 806f051f-acf8-46bb-919b-1ad5b7ef8fba))
+    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer "F.Fab") (width 0.1) (tstamp 81ae8ea9-82a0-4617-bb69-aa687954da06))
+    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer "F.Fab") (width 0.1) (tstamp 995d84ba-c25d-4e03-8631-2c1473da06a0))
+    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer "F.Fab") (width 0.1) (tstamp f17097da-5ce4-4e33-8eba-7e62dcb17b5d))
+    (pad "1" smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 3 "VDDA") (pintype "passive") (tstamp f35357c3-8d51-47f9-810d-970cc1053e7b))
+    (pad "2" smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 32 "/TXP") (pintype "passive") (tstamp bd5671f9-e41f-445f-81cd-fc92c5517b0a))
+    (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_arc (start 110.5 112.5) (mid 110.146447 112.353553) (end 110 112) (layer "Edge.Cuts") (width 0.1) (tstamp 1b27b212-f6be-4361-93af-1345adfd78d1))
+  (gr_line (start 110.5 112.5) (end 189.5 112.5) (layer "Edge.Cuts") (width 0.1) (tstamp 1bbd6a17-a3a4-4d64-91fb-960dc8c86e3e))
+  (gr_line (start 189.5 87.5) (end 110.5 87.5) (layer "Edge.Cuts") (width 0.1) (tstamp 32c682dc-0d51-48d4-ad7a-67bb52e887c8))
+  (gr_arc (start 189.5 87.5) (mid 189.853553 87.646447) (end 190 88) (layer "Edge.Cuts") (width 0.1) (tstamp 3739c676-d3f3-463a-8136-ee33186e8883))
+  (gr_arc (start 190 112) (mid 189.853553 112.353553) (end 189.5 112.5) (layer "Edge.Cuts") (width 0.1) (tstamp 38f7f5bc-f429-4925-96e0-70c773485a6f))
+  (gr_line (start 190 112) (end 190 88) (layer "Edge.Cuts") (width 0.1) (tstamp b0dd6ee3-0ec1-4fe6-a3ac-dff8fc4acf34))
+  (gr_arc (start 110 88) (mid 110.146447 87.646447) (end 110.5 87.5) (layer "Edge.Cuts") (width 0.1) (tstamp bd0f7918-d1af-4a58-8a81-84ecff580770))
+  (gr_line (start 110 88) (end 110 112) (layer "Edge.Cuts") (width 0.1) (tstamp ef6d9a30-d751-4692-98e4-c6aaec6df432))
+  (gr_text "Ethernet Pmod\nv1" (at 110.5 89.7) (layer "F.SilkS") (tstamp 26f739ef-9b16-4e32-b3a8-47bf49a8fc19)
+    (effects (font (size 1.2 1.2) (thickness 0.18)) (justify left))
+  )
+  (gr_text "lujoga 2022" (at 110.5 111) (layer "F.SilkS") (tstamp 4d0b6203-bce9-455d-a850-93c4d816b539)
+    (effects (font (size 1 1) (thickness 0.15)) (justify left))
+  )
+  (gr_text "JLCJLCJLCJLC" (at 130 100 90) (layer "F.SilkS") (tstamp 99e86908-ec7f-4cc6-a39a-a78be558ca0a)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+
+)
diff --git a/ethernet-pmod.kicad_pro b/ethernet-pmod.kicad_pro
index ada2251..eb14879 100644
--- a/ethernet-pmod.kicad_pro
+++ b/ethernet-pmod.kicad_pro
@@ -33,9 +33,9 @@
         "other_text_thickness": 0.15,
         "other_text_upright": false,
         "pads": {
-          "drill": 0.762,
-          "height": 1.524,
-          "width": 1.524
+          "drill": 0.0,
+          "height": 0.64,
+          "width": 0.54
         },
         "silk_line_width": 0.15,
         "silk_text_italic": false,
@@ -48,7 +48,13 @@
           "min_clearance": 0.508
         }
       },
-      "diff_pair_dimensions": [],
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        }
+      ],
       "drc_exclusions": [],
       "meta": {
         "version": 2
@@ -112,8 +118,15 @@
         "solder_mask_min_width": 0.0,
         "use_height_for_length_calcs": true
       },
-      "track_widths": [],
-      "via_dimensions": [],
+      "track_widths": [
+        0.0
+      ],
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        }
+      ],
       "zones_allow_external_fillets": false,
       "zones_use_no_outline": true
     },